ASIC Design Verification Engineer (Argentina)

ASIC Design Verification Engineer (Argentina)

29 sep
|
rydev
|
Argentina

29 sep

rydev

Argentina

Rydev is seeking an experienced (3-5 years) ASIC Design Verification Engineer for a remote post in Argentina or Uruguay (we're open to other places in Latin America too). In this role, you will ensure the quality and reliability of complex ASIC designs by developing verification strategies, implementing advanced UVM environments, and collaborating with cross-functional teams. This position offers the opportunity to mentor junior engineers and contribute to verification processes from module-level testing to full-chip closure.

Key Responsibilities

• Develop and execute IP/SoC verification plans, including the creation of test benches to support thorough verification processes.

• Design and implement functional tests aligned with verification test plans.

• Drive design verification to completion using defined metrics, including functional and code coverage analysis.

• Debug functional design failures in close collaboration with the design team.

• Innovate and enhance design verification methodologies, leveraging the latest tools and technologies.

• Provide support to junior verification engineers and assist customers' RTL designers with debugging and coding challenges.

Qualifications





• A minimum of 3 years of experience in ASIC Design Verification.

• Bachelor’s degree in Computer Engineering, Electrical Engineering, or Computer Science (Master’s in Electrical/Electronics Engineering with a focus on VLSI is preferred but not mandatory).

• Expertise in SystemVerilog and UVM methodology.

• Proficiency in SV Assertions and tools such as VCS, Verdi, or Xcelium.

• Advanced scripting skills in Python, TCL, Perl, or Shell.

• Experience in IP/SoC-level verification and advanced interface standards (PCIe gen 4-5, UAlink, UCIe, etc.) is a plus.

• Experience with using PCIe, I2C, or Ethernet VIPs (Avery/Siemens, Cadence, or Synopsys solutions) is a plus.

• Experience doing RTL design is a plus.

Why Join Us?

At Rydev, we work in groundbreaking ASIC projects using the latest CMOS technologies. We offer competitive pay for a adaptable, completely remote position. If you want to push the boundaries of ASIC design and verification, we’d love to hear from you!

• Apply today and take your career to the next level with Rydev.

📌 ASIC Design Verification Engineer (Argentina)
🏢 rydev
📍 Argentina

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