Memory Design Engineer (Buenos Aires)

Memory Design Engineer (Buenos Aires)

10 sep
|
Allegro MicroSystems
|
Buenos Aires

10 sep

Allegro MicroSystems

Buenos Aires

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.

About the Department

The Technology Development group is an integral organization of Allegro that includes Device Development, Foundry Operations, Modeling, ESD/EMC, and Design Enablement teams. The group facilitates all semiconductor devices and design automation research and development programs from concept through maturity. We ensure that the technology roadmap is aligned with the product roadmap and work across organizations. We manage partnerships with external foundries and suppliers to deliver cutting-edge semiconductor devices and design automation tools to support the product roadmap.

The Opportunity

What You Will Do
- Design NVM, VM, driver circuit, and digital IP.




- IP in silicon test and validation.
- Coordinate design requirements, macro floor planning, and layout design.
- Characterization and standardization of memory/digital IP for general design use within a custom PDK environment.What You Will Need

Applications knowledge of the following is required:
- Digital components (logic, memory, EEPROM, TAP controllers, JTAG, FPGA, serial data communication protocols, microprocessors and microcontrollers).
- Ability to develop Memory test/validation plans.
- Ability to characterize Memory/Standard Cells in standard liberty format.
- Ability to work with design teams on memory debug and diagnostics.
- EDA Skills/knowledge includes fundamental experience with Cadence tool flows (Virtuoso, Genus compiler, Innovus, Xcellium, Modus Test, and Quantus/Calibre) and IP Characterization tools.
- SW Experience includes the basic understanding of HDL languages (Verilog, VerilogA, and Veril

📌 Memory Design Engineer (Buenos Aires)
🏢 Allegro MicroSystems
📍 Buenos Aires

Postulate a este anuncio

Muestra tus habilidades a la empresa, rellenar el formulario y deja un toque personal en la carta, ayudará el reclutador en la elección del candidato.

Suscribete a esta alerta:

Recibe por email las nuevas ofertas de trabajo para: memory design engineer (buenos aires) / buenos aires

Suscribete a esta alerta:

Recibe por email las nuevas ofertas de trabajo para: memory design engineer (buenos aires) / buenos aires