10 sep
|
Allegro MicroSystems
|
Buenos Aires
10 sep
Allegro MicroSystems
Buenos Aires
The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.
About the Department
The Technology Development group is an integral organization of Allegro that includes Device Development, Foundry Operations, Modeling, ESD/EMC, and Design Enablement teams. The group facilitates all semiconductor devices and design automation research and development programs from concept through maturity. We ensure that the technology roadmap is aligned with the product roadmap and work across organizations. We manage partnerships with external foundries and suppliers to deliver cutting-edge semiconductor devices and design automation tools to support the product roadmap.
The Opportunity
What You Will Do
- Generate semiconductor component layouts in Cadence to support semiconductor technology development, process technology transfers, and device modeling.
- Primary interface and support of product design MASK/GDS releases to Foundry.
- Support Allegro product design Business Units with MASK tooling, Job deck review (JDV), and internal tape out system requirements.
- Support Allegro product design Business Units with MASK manufacturing requirements within the Foundry standard systems.
- Develop technology mask tape out workflow standards and documentation.
- Generate technology mask GDS using PDK Booleans for design review and Foundry manufacturing.
What You Will Need- Basic understanding of EDA design software.
- Working understanding of PDK components to include design rules, mask-gen, models, process parameters, test-chips, and design integration.
- Familiarity with web-based design management tools, documentation, and bug tracking systems.
- Ability to perform
📌 Technology Layout Engineer (Buenos Aires)
🏢 Allegro MicroSystems
📍 Buenos Aires