Responsibilities
- Design, describe, verify and document IP Cores
- Review, test and document existing IP Cores
- Participate in software/hardware integration and testing in our plant facilities
- Create design documents and interact with our software and hardware designers
- Design and document validation procedures
- Keep up with new technology trends to bring new ideas to the satellite
- Identify opportunities of improvement of existing satellite designs
- Participate in the definition and improvement of the team guidelines

Requirements
- Bachelor's degree in Electronics, Electrical, Computer Engineering or equivalent
- Hardware description in Verilog and/or VHDL
- Experience developing VHDL/Verilog testbenches and usage of simulation tools/debug environments




- Experience in hardware testing and debugging
- Good written and verbal communications skills in English
- Familiarity with Linux OS
- Experience in programming and scripting (eg C, Python, Bash Shell, Tcl)
- Experience with version control and repository management (Git, SVN)

Core Competencies

Demonstrates expertise in designing, verifying, and documenting IP Cores, with strong capabilities in hardware testing and debugging. Proficient in programming and scripting languages, and familiar with version control systems and Linux OS.

📌 Junior FPGA Engineer (Buenos Aires)
🏢 Jobtailor
📍 Buenos Aires