Celero Communications is seeking a Principal/Senior Analog Layout Engineer to drive the layout design of complex analog/mixed-signal IP blocks for high-performance optical systems. You will lead layout development for ADCs, DACs, PLLs, and related circuits, interfacing with circuit design, CAD/PDK teams, and other layout engineers.
You will mentor junior engineers, own layout quality, and contribute to top-level planning, ensuring first-pass silicon success in a fast-paced environment.
📌 Senior Analog Layout Lead for High-Speed IP (Córdoba)
🏢 Celero Communications
📍 Córdoba
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