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Signal Integrity Engineer – SSIO – Santa Clara – Supporting Supermicro or NvidiaResponsibilities
- Research and develop new high‑speed interconnect technologies within the SSIO product family by staying on top of emerging trends, patents, and competitive solutions.
- Predict and define performance limits for new connector technologies and influence next‑generation data center and server I/O standards.
- Use tools such as CST Studio Suite, ANSYS HFSS, and other 2D/3D solvers to model high‑speed connectors and cable structures for SSIO applications.
- Design and analyze high‑speed PCB test fixtures and interconnect systems aligned with standards like PCIe®, SFF, and SAS/SATA.
- Execute full SI analysis from modeling to lab validation using VNAs, TDRs, oscilloscopes, and bit‑error‑rate testers (BERTs).
- Perform link‑level simulations to support SSIO product design and interpret results to guide electrical and mechanical improvements.
- Document findings and recommendations in clear, professional technical reports and presentations.




- Provide technical guidance to integral teams and customers on performance, testing, and modeling.
- Support sales and marketing with technical collateral, data models, and presentations for SSIO product launches.
- Deliver accurate S‑parameter models and encrypted simulation data to key servers and storage OEM customers.
- Conduct SI analysis in response to customer requests and troubleshooting needs for SSIO solutions.
- Represent the company in industry standards committees (e.g., PCI‑SIG) to influence and align with next‑generation storage and server I/O specifications.

Requirements
- Education: Bachelor's degree in electrical engineering, Physics, or related field with 5+ years of current industry experience; or Master's degree in electrical engineering, Physics, or related field with 2+ years of current industry experience.
- Expertise in signal integrity simulation and analysis (CST, HFSS, ADS, or equivalent).
- Experience with high‑

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📌 Electrical Engineer (San Luis)
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